Adeas specializes in FPGA design services. Our knowledge and experience with the ins and outs of the latest components, tools and possibilities allow us to implement the most complex algorithms and high speed interfaces. This can be done completely real time in hardware or in combination with a processor core for which optimal code is designed.
Standard policy is to test each FPGA design by means of a specially developed test applications commonly called a test bench.
To save time and money we integrate internal or external Intellectual Property (IP) in our designs. This however is always discussed with our client.
FPGA floorplan
Through the extensive experience of our specialists with the component families of the market leaders and the (im-) possibilities of the design tooling we are able to choose the direction toward an optimal solution in an early stage. This is the case in sub problems like clock domain issues, signal filtering, resource reduction and timing requirements.
We are also familiar with the pitfalls and are able to avoid these. Furthermore we have early knowledge of new features, roadmaps and validated IP-cores and use this knowledge to our and our clients’ advantage.
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